PCE04C

This is a high speed 16 state CCSDS compatible parallel concatenated turbo encoder.

Features

• 16 state CCSDS compatible turbo encoder
• Rate 1/2 to 1/7
• Interleaver sizes from 1784 to 16056 bits
• Up to 220 MHz internal clock
• Up to 110 Mbit/s encoding speed
• Serial continuous encoded data out
• Available as EDIF core and VHDL simulation core for Xilinx Virtex-II Pro, Spartan-3, Virtex-4 and Virtex-5 FPGAs under SignOnce IP License. Actel, Altera and Lattice FPGA cores available on request.
• Available as VHDL core for ASICs
• Low cost university license also available
• Data Sheet 16 February 2009 (v1.01)

Last update 16 Feb 2009. Home