LCE02C

The LCE02C is a high speed encoder for the CCSDS telemetry (TM) accumulate, repeat by four, jagged accumulate (AR4JA) low density parity check (LDPC) standard. The encoder implements code rates of 1/2, 2/3 and 4/5 and data lengths of 1024 or 4096.

Features

• CCSDS TM AR4JA compatible
• Rate 1/2, 2/3 and 4/5
• Data lengths of 1024 or 4096 bits
• Up to 605 MHz internal clock
• Up to 60 Mbit/s encoding speed
• 1090 LUTs and 15 18KB BlockRAMs for Xilinx Virtex-5, Spartan-6, Virtex-6, 7-Series, UltraScale and UltraScale+ FPGAs
• Available as VHDL core for AMD-Xilinx FPGAs under SignOnce IP License. Custom ASIC, Intel/Altera, Lattice and Microchip/Microsemi/Actel FPGA cores available on request.
• Data Sheet 20 May 2022 (v1.00)

Last update 20 May 2022. Home